74AUP1G126GW,125

74AUP1G126GW,125 is a low-power buffer/line driver. It provides a single non-inverting buffer/line driver with a 3-state output. The 3-state output is controlled by the output enable input (OE). A LOW level at pin OE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input OE is LOW. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8V to 3.6V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8V to 3.6V. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

• Wide supply voltage range from 0.8V to 3.6V, ESD protection
• High noise immunity, complies with JEDEC standards
• Latch-up performance exceeds 100mA per JESD 78 Class II
• Inputs accept voltages upto 3.6V, low noise overshoot and undershoot <lt/>10% of VCC
• Input-disable feature allows floating input conditions
• IOFF circuitry provides partial power-down mode operation
• Supply current is 0.5μA maximum at (VI=GND or VCC;IO = 0A;VCC = 0.8V to 3.6V, Tamb = 25°C)
• Input capacitance is 0.9pF typical at (VCC = 0V to 3.6V;VI=GND or VCC, Tamb = 25°C)
• Propagation delay is 20.6ns typical at (VCC = 0.8V, Tamb = 25°C; CL = 5pF)
• Operating temperature range from -40°C to +125°C, TSSOP5 package

คำเตือน

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.