MX25U51245GZ4I00

MX25U51245GZ4I00 is 512Mbit serial NOR flash memory, which is configured as 67,108,864 x 8 internally. When it is in two or four I/O mode, the structure becomes 268,435,456 bits x 2 or 134,217,728 bits x 4. MX25U51245G feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25U51245G MXSMIO (Serial Multi I/O) provides sequential read operation on whole chip.

• Multi I/O support - single I/O, dual I/O and quad I/O
• Support DTR (Double Transfer Rate) mode
• 8/16/32/64 byte wrap-around read mode
• Typical 100,000 erase/program cycles
• 20 years data retention
• Latch-up protected to 100mA from -1V to Vcc +1V
• Temperature range from -40°C to 85°C
• Available in a 8 pin WSON package