ADCLK905BCPZ-R2

ADCLK905BCPZ-R2 is a ultrafast SiGe, ECL clock/data buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. It features full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply. The inputs have centre tapped, 100 ohm, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs. The ECL output stages are designed to directly drive 800mV each side into 50 ohm terminated to VCC -2V for a total differential output swing of 1.6V. It is used in applications such as clock and data signal restoration and level shifting, automated test equipment (ATE), high speed instrumentation, high speed line receivers, threshold detection, converter clocking.

• On-chip terminations at both input pins
• 2.5V to 3.3V power supply (VCC − VEE)
• Toggle rate is 7.5GHz typical at (<gt/>0.8V differential output swing, VCC = 3.3V ±10%)
• Random jitter is 60fs rms typical at (VID = 1600mV, 8V/ns, VICM = 1.85V)
• Propagation delay is 95ps typical at (VCC = 3.3V ±10%, VICM = VREF, VID = 0.5V p-p)
• Input bias current is 20µA typical at (VCC − VEE = 3.3V and TA = 25°C)
• Power supply rejection ratio is 3ps/V typical at (VCC − VEE = 3.0V ±20%)
• Input capacitance is 0.4pF typical at (VCC − VEE = 3.3V and TA = 25°C)
• Additive phase noise (622.08 MHz) is -138dBc/Hz typical at (10Hz offset)
• Operating temperature range from -40°C to +125°C, 16-lead LFCSP package

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