AD9552BCPZ

AD9552 is a fractional-N phase locked loop (PLL) based clock generator designed specifically to replace high frequency crystal oscillators and resonators. This device employs a sigma delta (Σ-Δ) modulator (SDM) to accommodate fractional frequency synthesis. The user supplies an input reference signal by connecting a single-ended clock signal directly to the REF pin or by connecting a crystal resonator across the XTAL pins. It is pin programmable, providing one of 64 standard output frequencies based on one of eight common input frequencies. It is used in applications such as cost effective replacement of high frequency VCXO, OCXO, and SAW resonators, extremely flexible frequency translation with low jitter for SONET/SDH (including FEC), 10Gb ethernet, fibre channel, and DRFI/DOCSIS, high-definition video frequency translation, wireless infrastructure, test and measurement (including handheld devices).

• Converts a low frequency input reference signal to a high frequency output signal
• Input frequencies from 6.6MHz to 112.5MHz
• Output frequencies upto 900MHz, arbitrary frequency translation ratios via SPI port
• Preset pin programmable frequency translation ratios, on-chip VCO
• Accepts a crystal resonator and/or an external oscillator as a reference frequency source
• Secondary output (either integer-related to the primary output or a copy of the reference input)
• SPI-compatible, 3-wire programming interface
• RMS jitter is 0.5ps typical at (fOUT = 625MHz)
• Single supply is 3.3V, rise/fall time (20% to 80%) is 500ps typical
• Operating temperature range from -40°C to +85°C, package style is 32-lead LFCSP-WQ

บันทึก

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party