ADPL44002ACPZN3.3-R7

ADPL44002ACPZN3.3-R7 is a CMOS, low-noise, low-dropout (LDO) linear regulator. This high-input-voltage LDO is ideal for the regulation of high-performance analogue and mixed-signal circuits operating from 39V down to 1.2V rails. Using an advanced proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2µF ceramic output capacitor. Applications include regulation to noise-sensitive applications (ADC, DAC circuits, precision amplifiers, power for VCO VTUNE control), communications and infrastructure, medical and healthcare, industrial and instrumentation.

• Precision enable, 2.7V to 40V input voltage range
• Operating supply current is 80µA typ at IOUT=0µA, TA=25°C
• Output voltage accuracy is 1% max at IOUT=10mA, TJ=25°C
• Sense input bias current is 10nA typ at 100μA < IOUT < 200mA VIN=(VOUT + 1V) to 40V
• Dropout voltage is 30mV typ at IOUT=10mA, TA=25°C
• Leakage current is 0.04µA typ at EN=VIN or GND, 2.7V ≤ VIN ≤ 40V, TA=25°C
• Output noise is 20µVRMS typ at 10Hz to 100kHz, all output voltage options
• 3.3V output voltage
• 6-lead LFCSP package
• Temperature range from -40°C to +125°C