CY2305SXI-1H

CY2305SXI-1H is a low cost 3.3V zero delay buffer. It has on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2305 PLL enters a power-down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25.0μA current draw for this part.

• High drive output
• 10MHz to 100/133MHz operating range, compatible with CPU and PCI bus frequencies
• Zero input-output propagation delay
• 60ps typical cycle-to-cycle jitter (high drive)
• 85ps typical output-to-output skew
• One input drives five outputs
• Compatible with Pentium-based systems
• Temperature range from –40°C to 85°C
• Available in a 8 pin SOIC package