AD9767ASTZRL

AD9767 is a dual-port, high speed, 2-channel, 14-bit CMOS DAC. Each part integrates two high quality TxDAC+® cores, a voltage reference, and digital interface circuitry. It offers exceptional ac and dc performance while supporting update rates of upto 125MSPS. It has been optimized for processing I and Q data in communications applications. The digital interface consists of two double-buffered latches as well as control logic. Separate write inputs allow data to be written to the two DAC ports independent of one another. Separate clocks control the update rate of the DACs. A mode control pin allows the device to interface to two separate data ports, or to a single interleaved high speed data port. In interleaving mode, the input data stream is demuxed into its original I and Q data and then latched. It is used in applications such as communications, base stations, digital synthesis, quadrature modulation, 3D ultrasound.

• Fully independent or single-resistor gain control
• Dual-port or interleaved data, on-chip 1.2V reference
• Integral linearity error is ±1.5LSB typical at (TA = 25°C)
• Differential nonlinearity is ±1LSB typical at (TA = 25°C)
• Offset error is +0.02% of FSR maximum at (TMIN to TMAX, AVDD = 3.3V or 5V)
• Reference voltage drift is 50ppm/°C typical at (TMIN to TMAX, AVDD = 3.3V or 5V)
• 5V or 3.3V operation, power dissipation is 380mW typical
• Small-signal bandwidth is 0.5MHz typical at (TMIN to TMAX, AVDD = 3.3V or 5V)
• Supply current sleep mode (IAVDD) is 8mA typical at (TMIN to TMAX, AVDD = 3.3V or 5V)
• Operating temperature is -40°C to +85°C, package style is 48-lead LQFP

บันทึก

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