AD9516-0BCPZ

AD9516-0 is a 14-output clock generator with integrated 2.8GHz VCO. It provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The AD9516-0 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. This features six LVPECL outputs and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. Each pair of outputs has dividers that allow both the divide ratio and coarse delay to be set. The range of division for the LVPECL outputs is 1 to 32. Application includes low jitter, low phase noise clock distribution, 10/40/100Gb/sec networking line cards, including SONET, synchronous Ethernet, OTU2/3/4, forward error correction (G.710), clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, high performance wireless transceivers, ATE and high performance instrumentation.

• Low phase noise, phase-locked loop (PLL)
• On-chip VCO tunes from 2.55 GHz to 2.95GHz
• 1 differential or 2 single-ended reference inputs
• Reference monitoring capability, automatic revertive and manual reference switchover/holdover modes
• Accepts LVPECL, LVDS, or CMOS references to 250MHz
• Programmable delays in path to PFD, digital or analogue lock detect, selectable
• Each output pair shares a 1-to-32 divider with coarse phase delay
• Additive output jitter is 225fs rms, channel-to-channel skew paired outputs of
• Fine delay adjust (Δt) on each LVDS output, automatic synchronization of all outputs on power-up
• 64 lead LFCSP-VQ package, operating temperature range from -40°C to +85°C

บันทึก

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